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5962-0620705Q3A, 5962-0620706Q3A, 5962-0620707Q2A, 5962-0620708Q2A
Data Sheet May 31, 2006 FN6298.0
15kV ESD Protected, +5.0V 1Microamp, 250kbps, RS-232 Transmitters/Receivers
The Intersil 5962-062070xQxA devices are 5.0V powered RS-232 transmitters/receivers which meet ElA/TIA-232 and V.28/V.24 specifications. Additionally, they provide 15kV ESD protection (IEC61000-4-2 Air Gap and MIL-STD 883 Human Body Model) on transmitter outputs and receiver inputs (RS-232 pins). Targeted applications include ruggedized portable products and remotely deployed devices exposed to extreme temperature and humidity where the low operational and even lower standby, power consumption is critical. Efficient on-chip charge pumps, coupled with manual and automatic power-down functions (except for the 5962-0620707Q2A), reduce the standby supply current to a 1A trickle. Small footprint packaging and the use of small, low value capacitors ensure board space savings as well. Data rates greater than 250kbps are guaranteed at worst case load conditions. This family is fully compatible with 5.0V-only systems. Specifications for QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed here must be used when ordering. Detailed Electrical Specifications for these devices are contained in SMD 5962-06207. A "hot-link" is provided on our website for downloading.
Features
* Meets EIA/TIA-232 and V.28/V.24 Specifications at 5V * Electrically Screened to DSCC SMD#5962-06207 * QML Qualified per MIL-PRF-38535 Requirements * SMD Compliance * Military Temperature Range * Latch-up Free * Hermetic Package * ESD Protection for RS-232 I/O Pins to 15kV (IEC61000) * Guaranteed Mouse Driveability (ICL3243E) * Requires Single +5.0V 10% Power Supply * Receiver Hysteresis for Improved Noise Immunity * Low Power Automatic Power-down Modes (Except for ICL3232E) . . . . . . . . . . . . . . . . . . . . . . . . .1A * Guaranteed Minimum 250kbps Data Rate * Manual and Automatic Power-down Features * Multiple Drivers/Receivers * On-Chip Voltage Converters Require Only Four External Capacitors * Regulated Dual Charge Pumps
Ordering Information
DESC P/N CONFIGURATION TEMP (C) PACKAGE -55 to +125 28 Ld CLCC -55 to +125 28 Ld CLCC -55 to +125 20 Ld CLCC -55 to +125 20 Ld CLCC 5962-0620705Q3A ICL3243E 3D/5R 5962-0620706Q3A ICL3238E 5D/3R 5962-0620707Q2A ICL3232E 2D/2R 5962-0620708Q2A ICL3221E 1D/1R
Applications
* Any Military or High-Rel System Requiring RS-232 Communication Ports - Battery Powered, Hand-Held, and Portable Equipment - Ruggedized Handheld GPS, Laptop Computers, Notebooks, Palmtops - Industrial Control/Shop Floor Communications - Field Deployed Sensors/Devices Exposed to Extreme Temperature/Humidity - Ruggedized Cellular/Mobile Phones
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
5962-0620705Q3A, 5962-0620706Q3A, 5962-0620707Q2A, 5962-0620708Q2A Pinouts
ICL3221E (CLCC) TOP VIEW
FORCEOFF
ICL3232E (CLCC) TOP VIEW
GND 18 NC 17 T1OUT 16 R1IN 15 R1OUT 14 T1IN 9 10 11 12 13 R2IN T2OUT R2OUT T2IN NC VCC NC 3 C1- 4 C2+ 5 C1+ V+ 2 GND
3 C1C2+ C2VNC 4 5 6 7 8 9 R1IN
2
1
20 19 18 NC 17 GND 16 T1OUT 15 NC 14 FORCEON
VCC
1 20 19
C1+
EN
V+
C2- 6 V- 7 NC 8
10 11 12 13 INVALID R1OUT T1IN NC
ICL3243E (CLCC) TOP VIEW
R1 IN VCC C2+ C1+ C2V+
ICL3238E (CLCC) TOP VIEW
VCC 26 25 C124 T1 IN 23 T2 IN 22 T3 IN 21 R1 OUT 20 R2 OUT 19 T4 IN 12 T5 OUT 13 FORCEON 14 FORCEOFF 15 INVALID 16 R1OUTB 17 T5 IN 18 R3 OUT C2+ C1+ 28 C2-
V-
R2 IN R3 IN R4 IN R5 IN T1 OUT T2 OUT T3 OUT
4 5 6 7 8 9 10 11 12 T3 IN
3
2
1
28
27
26 25 24 23 22 21 20 19 GND C1FORCEON FORCEOFF INVALID R2OUTB R1 OUT T1 OUT T2 OUT T3 OUT R1 IN R2 IN T4 OUT R3 IN 5 6 7 8 9 10 11
4
3
2
1
13 T2 IN
14 T1 IN
15 R5 OUT
16 R4 OUT
17 R3 OUT
18 R2 OUT
2
V+ 27
V-
FN6298.0 May 31, 2006
5962-0620705Q3A, 5962-0620706Q3A, 5962-0620707Q2A, 5962-0620708Q2A Pin Descriptions
PIN VCC V+ VGND C1+ C1C2+ C2TIN TOUT RIN ROUT ROUTB INVALID EN FORCEOFF FORCEON NOTE: 1. The ICL3238E input pins incorporate positive feedback resistors. Once the input is driven to a valid logic level, the feedback resistor maintains that logic level until VCC is removed. Unused transmitter inputs may be left unconnected by the user. System power supply input (4.5V to 5.5V). Internally generated positive transmitter supply. Internally generated negative transmitter supply. Ground connection. External capacitor (voltage doubler) is connected to this lead. External capacitor (voltage doubler) is connected to this lead. External capacitor (voltage inverter) is connected to this lead. External capacitor (voltage inverter) is connected to this lead. TTL/CMOS compatible transmitter Inputs. (Note 1) 15kV ESD Protected, RS-232 level (nominally 5.5V) transmitter outputs. 15kV ESD Protected, RS-232 compatible receiver inputs. TTL/CMOS level receiver outputs. TTL/CMOS level, noninverting, always enabled receiver outputs. Active low output that indicates if no valid RS-232 levels are present on any receiver input. Active low receiver enable control. Active low control to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON (See Tables 1 & 2, Note 1). Active high input to override automatic power-down circuitry thereby keeping transmitters active. (FORCEOFF must be high, Note 1). FUNCTION
TABLE 1. POWER-DOWN LOGIC TRUTH TABLE RCVR OR XMTR EDGE WITHIN 30 SEC? ICL3238E No No Yes Yes No No X X H H H H H H L L H H L L L L X X Active Active Active Active High-Z High-Z High-Z High-Z Active Active Active Active Active Active High-Z High-Z Active Active Active Active Active Active Active Active No Yes No Yes No Yes No Yes L H L H L H L H Normal Operation (Enhanced Auto Power-down Disabled) Normal Operation (Enhanced Auto Power-down Enabled) Power-down Due to Enhanced Auto Power-down Logic Manual Power-down RS-232 LEVEL PRESENT AT RECEIVER INPUT?
FORCEOFF FORCEON TRANSMITTER RECEIVER INPUT INPUT OUTPUTS OUTPUTS
ROUTB OUTPUT
INVALID OUTPUT
MODE OF OPERATION
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FN6298.0 May 31, 2006
5962-0620705Q3A, 5962-0620706Q3A, 5962-0620707Q2A, 5962-0620708Q2A
TABLE 1. POWER-DOWN LOGIC TRUTH TABLE (Continued) RCVR OR XMTR EDGE WITHIN 30 SEC? RS-232 LEVEL PRESENT AT RECEIVER INPUT?
FORCEOFF FORCEON TRANSMITTER RECEIVER INPUT INPUT OUTPUTS OUTPUTS
ROUTB OUTPUT
INVALID OUTPUT
MODE OF OPERATION
INVALID DRIVING FORCEON AND FORCEOFF (EMULATES AUTOMATIC POWER-DOWN) X X NOTE: 2. Input is connected to INVALID Output. TABLE 2. POWER-DOWN AND ENABLE LOGIC TRUTH TABLE RS-232 SIGNAL PRESENT AT RECEIVER INPUT? ICL3221E No No Yes Yes No No Yes Yes No No ICL3243E No Yes No Yes No NOTE: 3. Applies only to the ICL3243E. H H H L L H L L X X N.A. N.A. N.A. N.A. N.A. Active Active High-Z High-Z High-Z Active Active Active High-Z High-Z Active Active Active Active Active L H L H L Normal Operation (Auto Power-down Disabled) Normal Operation (Auto Power-down Enabled) Power-down Due to Auto Power-down Logic Manual Power-down Manual Power-down H H H H H H L L L L H H L L L L X X X X L H L H L H L H L H Active Active Active Active High-Z High-Z High-Z High-Z High-Z High-Z Active High-Z Active High-Z Active High-Z Active High-Z Active High-Z N.A. N.A. N.A. N.A. N.A. N.A. N.A. N.A. N.A. N.A. L L H H L L H H L L Normal Operation (Auto Power-down Disabled) Normal Operation (Auto Power-down Enabled) Power-down Due to Auto Power-down Logic Manual Power-down Manual Power-down w/Rcvr. Disabled Manual Power-down Manual Power-down w/Rcvr. Disabled Note 2 Note 2 Note 2 Note 2 Active High-Z Active High-Z Active Active Yes No H L Normal Operation Forced Auto Power-down
(NOTE 3) FORCEOFF FORCEON ROUTB EN TRANSMITTER RECEIVER INVALID INPUT INPUT INPUT OUTPUTS OUTPUTS OUTPUTS OUTPUT
MODE OF OPERATION
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FN6298.0 May 31, 2006
5962-0620705Q3A, 5962-0620706Q3A, 5962-0620707Q2A, 5962-0620708Q2A
Absolute Maximum Ratings
VCC to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V V- to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V Input Voltages TIN, FORCEOFF, FORCEON, EN . . . . . . . . . . . . . . . -0.3V to 6V RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V Output Voltages TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2V ROUT, INVALID. . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V Short Circuit Duration TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating (Receiver Input and Transmitter Output Pins) . . .15kV
Thermal Information
Thermal Resistance (Typical)
JA (C/W)
20 Ld CLCC Package . . . . . . . . . . . . . . . . . . . . . . . 90 28 Ld CLCC Package . . . . . . . . . . . . . . . . . . . . . . . 70 Maximum Junction Temperature (Ceramic Package) . . . . 150C Maximum Storage Temperature Range . . . . . . . . . . -65C to 150C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300C
Operating Conditions
Temperature Range ICL32XXE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55C to 125C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
ICL3221E, ICL3232E, ICL3243E Test Conditions: VCC = 4.5V to 5.5V, C1 = 0.01mF, C2 - C4 = 0.1mF; Unless Otherwise Specified. Typicals are at TA = 25C, VCC = 5.0V TEST CONDITIONS TEMP (C) MIN TYP MAX UNITS
PARAMETER DC CHARACTERISTICS Supply Current, Automatic Power-down Supply Current, Power-down Supply Current, Power-up
All RIN Open, FORCEON = GND, FORCEOFF = VCC (ICL3221E, ICL3243E Only) FORCEOFF = GND (Except ICL3232E) All Outputs Unloaded, FORCEON = FORCEOFF = VCC TIN, FORCEON, FORCEOFF, EN TIN, FORCEON, FORCEOFF, EN TIN, FORCEON, FORCEOFF, EN FORCEOFF = GND or EN = VCC IOUT = 1.6mA IOUT = -1.0mA Powers Up Powers Down IOUT = 1.6mA IOUT = -1.0mA
Full Full Full
-
1 1 0.3
10 10 1.8
A A mA
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS Input Logic Threshold Low Input Logic Threshold High Input Leakage Current Output Leakage Current (Except ICL3232E) Output Voltage Low Output Voltage High Full Full Full Full Full Full 2.2 0.01 0.05 0.8 10 10 0.4 V V A A V V
VCC -0.9 VCC -0.3 -2.7 -0.3 VCC-0.9 -25 0.6 3 -
AUTOMATIC POWER-DOWN (ICL3221E, ICL3243E Only, FORCEON = GND, FORCEOFF = VCC) Receiver Input Thresholds to Enable Transmitters Receiver Input Thresholds to Disable Transmitters INVALID Output Voltage Low INVALID Output Voltage High RECEIVER INPUTS Input Voltage Range Input Threshold Low Input Threshold High Input Resistance TRANSMITTER OUTPUTS Output Voltage Swing Output Resistance Output Short-Circuit Current All Transmitter Outputs Loaded with 3kW to Ground VCC = V+ = V- = 0V, Transmitter Output = 2V Full Full Full 5.0 300 5.4 10M 35 60 V mA Full Full Full Full 1.2 1.5 5 25 2.4 7 V V V k Full Full Full Full 2.7 0.3 0.4 V V V V
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FN6298.0 May 31, 2006
5962-0620705Q3A, 5962-0620706Q3A, 5962-0620707Q2A, 5962-0620708Q2A
Electrical Specifications
ICL3221E, ICL3232E, ICL3243E Test Conditions: VCC = 4.5V to 5.5V, C1 = 0.01mF, C2 - C4 = 0.1mF; Unless Otherwise Specified. Typicals are at TA = 25C, VCC = 5.0V (Continued) TEST CONDITIONS VOUT = 12V, VCC = 0V or 4.5V to 5.5V (ICL3232E,VCC = 0V only) Automatic Power-down or FORCEOFF = GND TEMP (C) Full MIN TYP MAX 25 UNITS A
PARAMETER Output Leakage Current
MOUSE DRIVEABILITY (ICL3243 Only) Transmitter Output Voltage TIMING CHARACTERISTICS Maximum Data Rate Transmitter Skew Receiver Skew Transition Region Slew Rate RL = 3kW, CL = 1000pF, One Transmitter Switching tPHL - tPLH tPHL - tPLH VCC = 5.0V, RL = 3kW to 7kW, Measured From 3V to -3V or -3V to 3V CL = 200pF to 2500pF CL = 200pF to 1000pF Full Full Full Full Full 250 4 6 500 200 100 8.0 1000 1000 50 50 kbps ns ns V/s V/s T1IN = T2IN = GND, T3IN = VCC, T3OUT Loaded with 3kW to GND, T1OUT and T2OUT Loaded with 2.5mA Each Full 5 V
ESD PERFORMANCE RS-232 Pins (TOUT, RIN) Human Body Model (MIL-STD 883 Method 3015) IEC61000-4-2 Contact Discharge IEC61000-4-2 Air Gap Discharge All Other Pins Human Body Model (MIL-STD 883 Method 3015) 25 25 25 25 15 8 15 2 kV kV kV kV
Electrical Specifications
ICL3238E Test Conditions: VCC = 4.5V to 5.5V, C1 = 0.01mF, C2 - C4 = 0.1mF, Unless Otherwise Specified. Typicals are at TA = 25C, VCC = 5.0V TEST CONDITIONS TEMP (C) MIN TYP MAX UNITS
PARAMETER DC CHARACTERISTICS Supply Current, Automatic Power-down Supply Current, Power-down Supply Current, Power-up
All RIN Open, FORCEON = GND, FORCEOFF = VCC FORCEOFF = GND All Outputs Unloaded, FORCEON = FORCEOFF = VCC
Full Full Full
-
1 1 0.3
10 10 1.8
A A mA
LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS Input Logic Threshold Low Input Logic Threshold High Input Leakage Current Output Leakage Current Output Voltage Low Output Voltage High RECEIVER INPUTS Input Voltage Range Input Threshold Low Input Threshold High Input Resistance Full Full Full Full -25 0.8 3 1.5 1.8 5 25 2.4 7 V V V k TIN, FORCEON, FORCEOFF Wake up Threshold TIN, FORCEON, FORCEOFF Wake up Threshold TIN, FORCEON, FORCEOFF, VIN = 0V or VCC (Note 4) FORCEOFF = GND IOUT = 1.0mA IOUT = -1.0mA Full Full Full Full Full Full 2.4 0.01 0.05 0.8 10 10 0.4 V V A A V V
VCC -0.9 VCC -0.3
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FN6298.0 May 31, 2006
5962-0620705Q3A, 5962-0620706Q3A, 5962-0620707Q2A, 5962-0620708Q2A
Electrical Specifications
ICL3238E Test Conditions: VCC = 4.5V to 5.5V, C1 = 0.01mF, C2 - C4 = 0.1mF, Unless Otherwise Specified. Typicals are at TA = 25C, VCC = 5.0V (Continued) (Continued) TEST CONDITIONS TEMP (C) MIN TYP MAX UNITS
PARAMETER
ENHANCED AUTOMATIC POWER-DOWN (FORCEON = GND, FORCEOFF = VCC) Receiver Input Thresholds to INVALID High Receiver Input Thresholds to INVALID Low INVALID Output Voltage Low INVALID Output Voltage High TRANSMITTER OUTPUTS Output Voltage Swing Output Short-Circuit Current Output Leakage Current TIMING CHARACTERISTICS Maximum Data Rate Transmitter Skew Receiver Skew Transition Region Slew Rate RL = 3k, CL = 1000pF, One Transmitter Switching tPHL - tPLH tPHL - tPLH VCC = 5.0V, RL = 3k to 7k, Measured From 3V to -3V or -3V to 3V CL = 150pF to 1000pF CL = 150pF to 2500pF Full Full Full Full Full 250 6 4 500 200 100 15 12 1000 1000 50 50 kbps ns ns V/s V/s VOUT = 12V, VCC = 0V or 4.5V to 5.5V, Automatic Power-down or FORCEOFF = GND All Transmitter Outputs Loaded with 3k to Ground Full Full Full 5.0 5.4 35 60 25 V mA A Powered Up Powered Down IOUT = 1.0mA IOUT = -1.0mA Full Full Full Full -2.7 -0.3 VCC-0.9 2.7 0.3 0.4 V V V V
ESD PERFORMANCE RS-232 Pins (TOUT, RIN) IEC61000-4-2 Air Gap Discharge IEC61000-4-2 Contact Discharge Human Body Model (MIL-STD 883 Method 3015) All Other Pins NOTE: 4. These inputs utilize a positive feedback resistor. The input current is negligible when the input is at either supply rail. Human Body Model (MIL-STD 883 Method 3015) 25 25 25 25 15 8 15 2.5 kV kV kV kV
Die Characteristics
INTERFACE MATERIALS: Glassivation: Type: PSG (Phosphorous Silicon Glass) Thickness: 13.0kA 1.0kA Top Metallization: Type: AlSiCu Thickness: 10.0kA 1kA ASSEMBLY RELATED INFORMATION: Substrate Potential: GND ADDITIONAL INFORMATION: Worst Case Current Density: <2.0 x 105 A/cm2 Transistor Count: ICL3221E: 286 ICL3232E: 296 ICL3243E: 464 ICL3238E: 1235 Process: Si Gate CMOS
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 7
FN6298.0 May 31, 2006
5962-0620705Q3A, 5962-0620706Q3A, 5962-0620707Q2A, 5962-0620708Q2A Ceramic Leadless Chip Carrier Packages (CLCC)
0.010 S E H S D D3
J28.A
MIL-STD-1835 CQCC1-N28 (C-4) 28 PAD CERAMIC LEADLESS CHIP CARRIER PACKAGE INCHES SYMBOL A A1 B B1 B2 B3 D D1 D2 MIN 0.060 0.050 0.022 0.006 0.442 MAX 0.100 0.088 0.028 0.022 0.460 MILLIMETERS MIN 1.52 1.27 0.56 0.15 11.23 1.83 REF 0.56 11.68 MAX 2.54 2.23 0.71 NOTES 6, 7 2, 4 2 2 2 5 5 3 3 3 Rev. 0 5/18/94
j x 45o
B
E3
E
0.072 REF
0.300 BSC 0.150 BSC 0.442 0.460 0.460 -
7.62 BSC 3.81 BSC 11.68 11.68 7.62 BSC 3.81 BSC 0.38 1.02 REF 0.51 REF 1.14 1.14 1.90 0.08 7 7 28 1.40 1.40 2.41 0.038 11.68 1.27 BSC 11.23
h x 45o 0.010 S E F S A A1 PLANE 2 PLANE 1
D3 E E1 E2 E3 e e1 h j
0.007 M E F S H S B1 L -H-
0.300 BSC 0.150 BSC 0.015 0.460 0.050 BSC 0.040 REF 0.020 REF 0.045 0.045 0.075 0.003 7 7 28 0.055 0.055 0.095 0.015
-E-
L L1
L3
e
L2 L3 ND NE N
-FE1 B3
NOTES: 1. Metallized castellations shall be connected to plane 1 terminals and extend toward plane 2 across at least two layers of ceramic or completely across all of the ceramic layers to make electrical connection with the optional plane 2 terminals.
E2
L2 B2
L1
2. Unless otherwise specified, a minimum clearance of 0.015 inch (0.38mm) shall be maintained between all metallized features (e.g., lid, castellations, terminals, thermal pads, etc.) 3. Symbol "N" is the maximum number of terminals. Symbols "ND" and "NE" are the number of terminals along the sides of length "D" and "E", respectively. 4. The required plane 1 terminals and optional plane 2 terminals (if used) shall be electrically connected. 5. The corner shape (square, notch, radius, etc.) may vary at the manufacturer's option, from that shown on the drawing. 6. Chip carriers shall be constructed of a minimum of two ceramic layers. 7. Dimension "A" controls the overall package thickness. The maximum "A" dimension is package height before being solder dipped. 8. Dimensioning and tolerancing per ANSI Y14.5M-1982. 9. Controlling dimension: INCH.
e1
D1
D2
8
FN6298.0 May 31, 2006
5962-0620705Q3A, 5962-0620706Q3A, 5962-0620707Q2A, 5962-0620708Q2A Ceramic Leadless Chip Carrier Packages (CLCC)
0.010 S E H S D D3
J20.A
MIL-STD-1835 CQCC1-N20 (C-2) 20 PAD CERAMIC LEADLESS CHIP CARRIER PACKAGE INCHES SYMBOL A A1 B B1 B2 B3 D D1 D2 MIN 0.060 0.050 0.022 0.006 0.342 MAX 0.100 0.088 0.028 0.022 0.358 MILLIMETERS MIN 1.52 1.27 0.56 0.15 8.69 1.83 REF 0.56 9.09 MAX 2.54 2.23 0.71 NOTES 6, 7 2, 4 2 2 2 5 5 3 3 3 Rev. 0 5/18/94
j x 45o
B
E3
E
0.072 REF
0.200 BSC 0.100 BSC 0.342 0.358 0.358 -
5.08 BSC 2.54 BSC 9.09 9.09 5.08 BSC 2.54 BSC 0.38 1.02 REF 0.51 REF 1.14 1.14 1.91 0.08 5 5 20 1.40 1.40 2.41 0.38 9.09 1.27 BSC 8.69
h x 45o 0.010 S E F S A A1 PLANE 2 PLANE 1
D3 E E1 E2 E3 e e1 h j
0.007 M E F S H S B1 L -H-
0.200 BSC 0.100 BSC 0.015 0.358 0.050 BSC 0.040 REF 0.020 REF 0.045 0.045 0.075 0.003 5 5 20 0.055 0.055 0.095 0.015
-E-
L L1 L2 L3 ND NE N
e
L3
-FE1 B3
NOTES: 1. Metallized castellations shall be connected to plane 1 terminals and extend toward plane 2 across at least two layers of ceramic or completely across all of the ceramic layers to make electrical connection with the optional plane 2 terminals. 2. Unless otherwise specified, a minimum clearance of 0.015 inch (0.38mm) shall be maintained between all metallized features (e.g., lid, castellations, terminals, thermal pads, etc.) 3. Symbol "N" is the maximum number of terminals. Symbols "ND" and "NE" are the number of terminals along the sides of length "D" and "E", respectively. 4. The required plane 1 terminals and optional plane 2 terminals (if used) shall be electrically connected. 5. The corner shape (square, notch, radius, etc.) may vary at the manufacturer's option, from that shown on the drawing. 6. Chip carriers shall be constructed of a minimum of two ceramic layers. 7. Dimension "A" controls the overall package thickness. The maximum "A" dimension is package height before being solder dipped. 8. Dimensioning and tolerancing per ANSI Y14.5M-1982. 9. Controlling dimension: INCH.
E2
L2 B2
L1
e1
D1
D2
9
FN6298.0 May 31, 2006

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